DocumentCode :
3178116
Title :
The DEVS model of computation A foundation for a novel embedded systems design methodology
Author :
Molter, R. Gregor ; Huss, Sorin A.
Author_Institution :
Integrated Circuits & Syst. Lab., Tech. Univ. Darmstadt, Darmstadt, Germany
fYear :
2011
fDate :
Nov. 29 2011-Dec. 1 2011
Abstract :
In the recent past, abstraction in system-level design has been significantly increased to manage the increasing complexity of modern embedded systems. To establish such higher abstraction levels, Models of Computation were introduced to the design flow. In this paper, the advantages and benefits of a Models of Computation based workflow are advocated. We illustrate this process by exploiting the Discrete Event Specified System model of computation. Because of embodying an event-based specification, this model is highly applicable for codesign purposes. In addition, reconfigurable hardware architectures have emerged as a promising technique to increase the flexibility of hardware design. While this new technology is still in its infancy, especially the support of dynamic reconfiguration will clearly expand the present limitations of both hardware and embedded systems design. Currently, the development of dynamically reconfigurable systems is still lacking an established design methodology. Most research in this area tries to extend classical hardware design flows. We see the main disadvantage of these approaches in their lack of an underlying formal model of computation. Therefore, RecDEVS is introduced and exploited as a computational foundation for the development of a comprehensive reconfigurable embedded systems design methodology. The resulting workflow for reconfigurable embedded systems consisting of formal verification, validation, HW/SW-codesign, and HW synthesis is then detailed and demonstrated for real-life application examples.
Keywords :
embedded systems; formal specification; hardware-software codesign; reconfigurable architectures; DEVS model-of-computation; codesign purpose; discrete event specified system; discrete event system specification i; embedded systems design methodology; event-based specification; reconfigurable hardware architecture; Computational modeling; Hardware; Irrigation; Silicon; Discrete Event Specified Systems; Dynamic Reconfiguration; Models of Computation; Software/Hardware-Codesign; System Level Design Flow;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Engineering & Systems (ICCES), 2011 International Conference on
Conference_Location :
Cairo
Print_ISBN :
978-1-4577-0127-6
Type :
conf
DOI :
10.1109/ICCES.2011.6140989
Filename :
6140989
Link To Document :
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