• DocumentCode
    3178347
  • Title

    The DEVS model of computation - a foundation for a novel embedded systems design methodology

  • Author

    Huss, Sorin Alexander

  • Author_Institution
    CASED - Center for Adv. Security Res. Darmstadt, Darmstadt, Germany
  • fYear
    2011
  • fDate
    Nov. 29 2011-Dec. 1 2011
  • Abstract
    Summary form only given. In the recent past the abstraction in system-level design has been significantly increased to manage the increasing complexity of modern embedded systems. To establish such higher abstraction levels, Models of Computation (MoC) were introduced to the design flow. In this talk the advantages and benefits of a MoC based workflow are advocated. We illustrate this process by exploiting the Discrete Event Specified System (DEVS) MoC. Because of embodying an event-based specification, this model is highly applicable for codesign purposes. In addition, reconfigurable hardware architectures have emerged as a promising technique to increase the flexibility of hardware design. While this new technology is still in its infancy, especially the support of dynamic reconfiguration will clearly expand the present limitations of both hardware and embedded systems design. Currently, the development of dynamically reconfigurable systems is still lacking an established design methodology. Most research in this area tries to extend classical hardware design flows. We see the main disadvantage of these approaches in their lack of an underlying formal model of computation. Therefore, a formal MoC named RecDEVS is introduced and exploited as a computational foundation for the development of a comprehensive reconfigurable embedded systems design methodology. The resulting workflow for reconfigurable embedded systems consisting of formal verification, validation, SW/HW-codesign, and HW synthesis is then detailed and demonstrated for real-life application examples.
  • Keywords
    embedded systems; formal specification; formal verification; hardware-software codesign; reconfigurable architectures; DEVS model-of-computation; codesign purpose; discrete event specified system; embedded systems design; event-based specification; formal validation; formal verification; hardware synthesis; reconfigurable hardware architecture; software-hardware codesign; system-level design;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Engineering & Systems (ICCES), 2011 International Conference on
  • Conference_Location
    Cairo
  • Print_ISBN
    978-1-4577-0127-6
  • Type

    conf

  • DOI
    10.1109/ICCES.2011.6141001
  • Filename
    6141001