Analyses of flip chip bumps and solder joints for six sigma manufacturing

Author

Wolverton, Mike ; Chan, Yiu Wai Andy ; Baughn, Terry

Author_Institution

Raytheon Electron., Dallas, TX, USA

fYear

1998

fDate

27-30 May 1998

Firstpage

166

Lastpage

170

Abstract

The manufacture of six sigma quality high density interconnects by use of tin-lead solder flip chip bumps has prompted the application of computational analysis tools to assist in establishing the significance of variations of the bumps. Analytical model results and finite element predictions of solder joint geometry were compared to measured data. The solder geometric data and independently established component and substrate warpage were combined to calculate interconnect manufacturability

Keywords

circuit analysis computing; finite element analysis; flip-chip devices; integrated circuit interconnections; integrated circuit packaging; integrated circuit reliability; integrated circuit testing; integrated circuit yield; microassembling; quality control; soldering; component warpage; computational analysis tools; finite element predictions; flip chip bumps; flip chip solder joints; high density interconnects; interconnect manufacturability; six sigma manufacturing; six sigma quality manufacture; solder bump variations; solder geometric data; solder joint geometry; substrate warpage; tin-lead solder flip chip bumps; Analytical models; Computer aided manufacturing; Computer applications; Finite element methods; Flip chip; Geometry; Independent component analysis; Semiconductor device measurement; Six sigma; Soldering;

fLanguage

English

Publisher

ieee

Conference_Titel

Thermal and Thermomechanical Phenomena in Electronic Systems, 1998. ITHERM '98. The Sixth Intersociety Conference on

Conference_Location

Seattle, WA

ISSN

1089-9870

Print_ISBN

0-7803-4475-8

Type

conf

DOI

10.1109/ITHERM.1998.689536

Filename

689536