DocumentCode
3179531
Title
Mitigating TSV-induced substrate noise in 3-D ICs using GND plugs
Author
Khan, Nauman H. ; Alam, Syed M. ; Hassoun, Soha
Author_Institution
Dept. of Comput. Sci., Tufts Univ., Medford, MA, USA
fYear
2011
fDate
14-16 March 2011
Firstpage
1
Lastpage
6
Abstract
Through-silicon vias (TSVs) in 3-D ICs are a major source of substrate noise, causing performance degradation of neighboring active devices. To reduce this noise, we propose using a tungsten-filled ground plug, a TSV-like structure that connects to ground (GND) and that partially or completely extends through the substrate. We evaluate the impact of plug size and placement on noise isolation. We compare the GND plug technique with two other noise mitigation techniques: using a thicker dielectric liner and using a backside ground plane. Our study demonstrates that the GND plug is a superior technology, effective in mitigating TSV-induced substrate noise by an order of magnitude when compared to the other two techniques. The GND plug offers a more practical noise isolation approach than using a backside ground plane. When compared with increased dielectric thickness, the GND plug offers a 33% reduction in foot print and permits a significantly reduced keep out zone.
Keywords
three-dimensional integrated circuits; 3D IC; GND plug technique; TSV-induced substrate noise mitigation; backside ground; dielectric liner; foot print reduction; noise isolation approach; plug size; through-silicon vias; tungsten-filled ground plug; Dielectrics; Noise; Plugs; Silicon; Substrates; Through-silicon vias; Transient analysis; 3-D integrated circuit (IC); 3-D integration; substrate noise; through-silicon via (TSV);
fLanguage
English
Publisher
ieee
Conference_Titel
Quality Electronic Design (ISQED), 2011 12th International Symposium on
Conference_Location
Santa Clara, CA
ISSN
1948-3287
Print_ISBN
978-1-61284-913-3
Type
conf
DOI
10.1109/ISQED.2011.5770813
Filename
5770813
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