DocumentCode
3179575
Title
Constructive AIG optimization considering input weights
Author
Figueiró, Thiago ; Ribas, Renato Perez ; Reis, André Inácio
Author_Institution
PGMICRO, UFRGS, Porto Alegre, Brazil
fYear
2011
fDate
14-16 March 2011
Firstpage
1
Lastpage
8
Abstract
This work presents a technology independent synthesis algorithm that works on top of an And-Inverter Graph (AIG) data structure. The goal is to minimize the number of nodes and the depth of the AIG, by controlling these characteristics while building the graph. Moreover, large circuits are usually synthesized in stages (cuts) and, therefore, it is desirable to consider different weights to the input nodes of the AIGs in order to represent signal delay from previous circuit stages. This paper incorporates the employ of input weights to a novel approach for AIG construction based on a new synthesis paradigm called functional composition. The idea is to perform the synthesis by associating simpler AIGs, in a bottom-up approach. The method constructively controls characteristics of final and intermediate graphs, allowing the adoption of secondary criteria other than the number of AIG nodes for optimization.
Keywords
delays; electronic design automation; logic CAD; minimisation; AIG depth minimization; AIG node minimization; and-inverter graph data structure; bottom-up approach; constructive AIG optimization; design automation; functional composition; input weights; logic synthesis; signal delay; synthesis algorithm; Boolean functions; Buildings; Data structures; Delay; Equations; Mathematical model; Minimization; And-Inverter Graph; Design Automation; Functional Composition; Logic Synthesis;
fLanguage
English
Publisher
ieee
Conference_Titel
Quality Electronic Design (ISQED), 2011 12th International Symposium on
Conference_Location
Santa Clara, CA
ISSN
1948-3287
Print_ISBN
978-1-61284-913-3
Type
conf
DOI
10.1109/ISQED.2011.5770816
Filename
5770816
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