Two-Level Early Stopping Algorithm for LTE Turbo Decoding

The design of LTE turbo coding chain suitable for flexible parallel and pipelined hardware implementations is presented. The hierarchical data structure further offers an opportunity to design an efficient two-level early stopping algorithm. An analytical model is developed to compute the distribution of actual decoding iterations performed by the proposed algorithm. It is then shown the scheme can reduce both the total hardware requirement at the design phase as well as the average power consumption at run-time of turbo decoders.