JPEG compression/decompression via parallel processing

Author

Patrick, John S. ; Sanders, Jake L. ; DeBrunner, Linda S. ; DeBrunner, Victor E. ; Radharkrishnan, S.

Author_Institution

Sch. of Electr. & Comput. Eng., Oklahoma Univ., Norman, OK, USA

Volume

1

fYear

1996

fDate

3-6 Nov. 1996

Firstpage

596

Abstract

In this paper, a method for a parallel pipelined implementation of baseline JPEG compression and decompression is introduced for use on 4 Texas Instruments´ TMS320C40 digital signal processors. A PC host with 2 Sonitech dual ´C40 boards is used for this implementation. The DCT is implemented using 2 ´C40s, while quantization and Huffman encoding are each performed using a single ´C40. This novel implementation provides significant speedup over a sequential implementation by pipelining 8/spl times/8 blocks, through the parallel implementation.

Keywords

Huffman codes; data compression; decoding; digital signal processing chips; discrete cosine transforms; image coding; image processing equipment; parallel processing; pipeline processing; DCT; Huffman encoding; JPEG; Sonitech dual ´C40 boards; TMS320C40 digital signal processors; Texas Instruments DSP; image compression; image decompression; parallel processing; pipelined implementation; quantization; Compression algorithms; Computer networks; Digital signal processors; Discrete cosine transforms; ISO standards; Image coding; Instruments; Parallel processing; Quantization; Transform coding;

fLanguage

English

Publisher

ieee

Conference_Titel

Signals, Systems and Computers, 1996. Conference Record of the Thirtieth Asilomar Conference on

Conference_Location

Pacific Grove, CA, USA

ISSN

1058-6393

Print_ISBN

0-8186-7646-9

Type

conf

DOI

10.1109/ACSSC.1996.601094

Filename

601094