DocumentCode
3180837
Title
CMOS Voltage Divider based Current Mirror
Author
Thrivikrammaru, Vinai
Author_Institution
Electron. & Commun. Eng. Dept., MANIT, Bhopal, India
fYear
2011
fDate
11-14 Dec. 2011
Firstpage
291
Lastpage
295
Abstract
This work proposes the Novel design of a CMOS Voltage Divider based Current Mirror that is suitable for Low current biasing applications. The input/output characteristics of the proposed current mirror are discussed. Designed circuit is simulated in a proprietary 180 nm CMOS process, using Cadence Spectre and UMC models. Based on simulation and test results of the newly proposed design, the minimal power consumption is being highlighted. When compared with Basic Current Mirror circuits, CMOS Voltage Divider based current mirror achieves 75% of saving in power consumption.
Keywords
CMOS integrated circuits; current mirrors; low-power electronics; voltage dividers; CMOS process; CMOS voltage divider; Cadence Spectre; UMC models; basic current mirror circuits; input/output characteristics; low current biasing; power consumption; size 180 nm; CMOS integrated circuits; Logic gates; MOSFETs; Mirrors; Modulation; Power demand; Current Mirror; Low power; Voltage Divider;
fLanguage
English
Publisher
ieee
Conference_Titel
Information and Communication Technologies (WICT), 2011 World Congress on
Conference_Location
Mumbai
Print_ISBN
978-1-4673-0127-5
Type
conf
DOI
10.1109/WICT.2011.6141260
Filename
6141260
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