• DocumentCode
    3182032
  • Title

    Technology of Stacking Vertical Interconnecting Micro-Assembly

  • Author

    Bao, Zhang ; Zhong, Wang ; Xiangjun, Wang

  • Author_Institution
    Tianjin Univ., Tianjin
  • fYear
    2007
  • fDate
    26-28 June 2007
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    Vertical interconnecting can effectively reduce the substantial size and increase the interconnecting ability and accessibility It is one of the most important trends of the novel assembly technology. Based on the characteristics of 3-D packaging and cubic assembly technology, this paper studies the stacking vertical interconnecting assembly technology. Vertical interconnecting of electronic packaging module with both-sides electrodes and transfer layer with circuit transferring function can make the circuit chips stack along z-axis, forming a kind of microelectronic system of stacking assembly. Experiment shows that this method can greatly shorten the interconnecting length of chips and reduce the area and cubage, and both-sides electrodes and transfer layer are the key to success.
  • Keywords
    integrated circuit interconnections; integrated circuit packaging; microassembling; 3-D packaging characteristics; circuit chip stacks; circuit transferring function; cubic assembly technology; electronic packaging module; microassembly; microelectronic system; stacking vertical interconnecting assembly technology; Assembly systems; CMOS technology; Delay effects; Electrodes; Electronics packaging; Integrated circuit interconnections; Integrated circuit packaging; Power system interconnection; Space technology; Stacking;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Density packaging and Microsystem Integration, 2007. HDP '07. International Symposium on
  • Conference_Location
    Shanghai
  • Print_ISBN
    1-4244-1253-6
  • Electronic_ISBN
    1-4244-1253-6
  • Type

    conf

  • DOI
    10.1109/HDP.2007.4283566
  • Filename
    4283566