DocumentCode :
3182050
Title :
Warpage Study of a Package on Package Configuration
Author :
Tang, Hao ; Nguyen, Jonathan ; Zhang, Jack ; Chien, Irving
Author_Institution :
Henkel Technol., Irvine
fYear :
2007
fDate :
26-28 June 2007
Firstpage :
1
Lastpage :
5
Abstract :
Fast growing package-on-package (POP) technology provides cost effective format to ASIC and memory devices. Similar to die stacking configurations, package stacking also follows a trend of very thin package profiles, fine pitches, and tightened design rules. One challenge to package assembly engineers and materials vendors is warpage control. The warpage of the top and bottom packages has to be very similar throughout reflow to ensure high yield in assembly process. Package warpage is generated mainly from curing and cooling process of molding compounds that encapsulates die and components within a package. Optimized molding compound properties are the keys to achieve desired warpage behavior of a package. In this paper, a new flexible hardener technology is introduced for modifying the property of molding compound to achieve targeted warpage behavior. A series of molding molding compound is formulated by systemically varying flexible hardener content while fixing other ingredients in the formulation. The effectiveness of the flexible hardener on warpage is then studied by establishing the relationship between warpage and the physical property of different material produced by different flexible hardener content. Also in the end, the effect of temperature change on package warpage is also studied on one particular molding compound. Finite element analysis is also performed to study the response of warpage to temperature. Experimental results were also used to calibrate simulation results to further improve simulation accuracies.
Keywords :
application specific integrated circuits; encapsulation; finite element analysis; hardening; integrated circuit packaging; memory architecture; microassembling; moulding; ASIC; cooling process; curing process; die stacking configurations; finite element analysis; hardener technology; materials vendor; memory devices; molding compounds; package assembly; package stacking; package-on-package technology; warpage control; Application specific integrated circuits; Assembly; Cooling; Costs; Curing; Finite element methods; Packaging; Performance analysis; Stacking; Temperature;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High Density packaging and Microsystem Integration, 2007. HDP '07. International Symposium on
Conference_Location :
Shanghai
Print_ISBN :
1-4244-1253-6
Electronic_ISBN :
1-4244-1253-6
Type :
conf
DOI :
10.1109/HDP.2007.4283567
Filename :
4283567
Link To Document :
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