DocumentCode
318299
Title
Implementations of on sensor image compression and comparisons between pixel and column parallel architectures
Author
Aizawa, K. ; Hamamoto, T. ; Ohtsuka, Y. ; Hatori, M. ; Abe, M.
Author_Institution
Dept. of Electr. Eng., Tokyo Univ., Japan
Volume
2
fYear
1997
fDate
26-29 Oct 1997
Firstpage
258
Abstract
In order to enhance performance of an image sensor, we have been investigating a novel integration of compression and sensing. By this integration, the image signal that has to be readout from the sensor is significantly reduced. Thus, the integration can consequently leads to high pixel rate sensing. The compression scheme we make use of is conditional replenishment that detects and encodes moving areas. We have developed prototypes based on two different architectures, that are pixel parallel and column parallel architectures. We present the two prototypes and their comparisons, and show the results obtained by them
Keywords
data compression; digital signal processing chips; image coding; image sensors; parallel architectures; column parallel architecture; conditional replenishment; high pixel rate sensing; image signal; moving areas encoding; performance; pixel parallel architecture; sensor image compression; Biological information theory; Biosensors; Image coding; Image sensors; Parallel architectures; Pixel; Prototypes; Retina; Signal detection; Signal processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Image Processing, 1997. Proceedings., International Conference on
Conference_Location
Santa Barbara, CA
Print_ISBN
0-8186-8183-7
Type
conf
DOI
10.1109/ICIP.1997.638736
Filename
638736
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