DocumentCode
3183052
Title
On the scalability of SIMD processing for software defined radio algorithms
Author
Westermann, Peter ; Schröder, Hartmut
Author_Institution
Circuits & Syst. Lab., Tech. Univ. Dortmund, Dortmund, Germany
fYear
2010
fDate
19-22 July 2010
Firstpage
309
Lastpage
317
Abstract
Software defined radio (SDR) systems require programmable architectures that provide high performance combined with high energy efficiency. Wide single instruction, multiple data (SIMD) architectures could potentially satisfy these demands, but only few publications examine the interdependence between the SIMD width and the performance of typical SDR algorithms. In this paper, we present a detailed analysis of three SDR algorithm classes on a newly developed scalable SIMD architecture, which combines SIMD processing with long instruction word (LIW) execution. Although radix-2 and mixed-radix fast Fourier transform, sphere decoding, and low-density parity-check decoding all benefit from SIMD processing, our results show that there are different constraints on the performance.
Keywords
decoding; fast Fourier transforms; parallel architectures; parity check codes; reconfigurable architectures; software radio; SIMD processing; long instruction word execution; low density parity check decoding; mixed radix fast Fourier transform; programmable architecture; radix-2 fast Fourier transform; scalable SIMD architecture; single instruction multiple data architecture; software defined radio algorithm; sphere decoding; Algorithm design and analysis; Computer architecture; Decoding; Parity check codes; Radio frequency; Registers; Scalability;
fLanguage
English
Publisher
ieee
Conference_Titel
Embedded Computer Systems (SAMOS), 2010 International Conference on
Conference_Location
Samos
Print_ISBN
978-1-4244-7936-8
Electronic_ISBN
978-1-4244-7938-2
Type
conf
DOI
10.1109/ICSAMOS.2010.5642052
Filename
5642052
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