Integrating ADC IP in a SoC and Its Verification

More and more analog and mixed-signal (AMS) blocks are integrated into SoC (system-on-chip) platform due to intense market competition. In this paper we proposed a method for IP integration of mixed-signal SoCs. With continuous growing of design scale and complex validation of mixed-signal functions, a new verification methodology for large mixed-signal SoC designs using Synopsys Discovery AMS platform is given to handle the daunting challenge. We will give a brief introduction with an example of SoC design which contains a reusable 10-bit SAR ADC IP block. And the detailed flow of using NanoSim-VCS co-simulation environment for the example is elaborated.