Design of SSCMP with Arbiter and Shared Data Memory Interrupt

In the machine vision system, a common and effective way to solve high complexity and huge throughput of image processing arithmetic computation is to adopt instruction-level-parallel scheme through multiple MCUs with the single-threading architecture. Based on it, this paper proposed a kind of symmetric single-chip multiprocessor (SSCMP) architecture, which composed of four subprocessors and one solution for on-chip arbiter and shared data memory interrupt (SDMI). Each subprocessor could work in cooperant and also was completely independent mode. What´s more, the proposed architecture set up a shared space for command transfering and data exchanging. An arbiter judgment scheme and effective interrupt access mechanism were introduced to reduce the burden of data exchange and eliminate competitions between the subprocessors.