DocumentCode :
3183695
Title :
Design and realization of sub 100 nm gate length HEMTs
Author :
Parenty, T. ; Bollaert, S. ; Mateos, J. ; Wallart, X. ; Cappy, A.
Author_Institution :
Dept. Hyperfrequences et Semicond., CNRS, Villeneuve d´´Ascq, France
fYear :
2001
fDate :
2001
Firstpage :
626
Lastpage :
629
Abstract :
Standard layer structure InAlAs/InGaAs/EnP designed for 100 nanometer gate length High Electron Mobility Transistors (HEMTs) become inadequate, if we reduce the gate length under 100 nm. An InAlAs/InGaAs/InP layer structure optimized for 50 nanometer gate length HEMTs has been realized. DC and microwave characteristics are reported on HEMTs realized on a standard layer and an optimized layer, with similar gate length. Comparable cutoff frequencies fT are obtained for both devices. The main result is a large improvement of maximum oscillation frequency fmax, which is 260 GHz and 470 GHz for respectively the standard and the optimized devices. This behavior is attributed to the reduction of short channel effects
Keywords :
III-V semiconductors; aluminium compounds; gallium arsenide; high electron mobility transistors; indium compounds; microwave field effect transistors; 50 nm; DC characteristics; InAlAs-InGaAs-InP; InAlAs/InGaAs/InP layer structure; cutoff frequency; design optimization; gate length; high electron mobility transistor; maximum oscillation frequency; microwave characteristics; short channel effect; Cutoff frequency; Doping; HEMTs; Indium compounds; Indium gallium arsenide; Indium phosphide; MODFETs; Microwave devices; Performance gain; Tunneling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Indium Phosphide and Related Materials, 2001. IPRM. IEEE International Conference On
Conference_Location :
Nara
ISSN :
1092-8669
Print_ISBN :
0-7803-6700-6
Type :
conf
DOI :
10.1109/ICIPRM.2001.929234
Filename :
929234
Link To Document :
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