Title :
Memory test-debugging test vectors without ATE
Author_Institution :
TSSI Div., Summit Design Inc., Beaverton, OR, USA
Abstract :
A method for debugging functional production test vectors for memory devices without the use of Automated Test Equipment (ATE) is presented. The method described involves the use of a digital simulation environment; a reactive Hardware Description Language (HDL) ATE model; and ATE rules checking. The method allows for rapidly debugging vectors and rest program flows without requiring the use of ATE resources
Keywords :
automatic test equipment; digital simulation; hardware description languages; integrated memory circuits; program debugging; ATE; Automated Test Equipment; debugging test vectors; digital simulation; functional production test vectors; memory devices; reactive Hardware Description Language; rules checking; Automatic testing; Concurrent engineering; Costs; Databases; Debugging; Hardware design languages; Logic testing; Production; Switches; Timing;
Conference_Titel :
Test Conference, 1997. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-4209-7
DOI :
10.1109/TEST.1997.639678
