A novel functional test generation method for processors using commercial ATPG

Author

Tupuri, Raghuram S. ; Abraham, Jacob A.

Author_Institution

Adv. Process. Dev., Adv. Micro Devices Inc., Austin, TX, USA

fYear

1997

fDate

1-6 Nov 1997

Firstpage

743

Lastpage

752

Abstract

As the sizes of general and special purpose processors increase rapidly, generating high quality manufacturing tests for them is becoming a serious problem in industry. This paper describes a novel method for hierarchical functional test generation for processors which targets one embedded module at a time and uses commercial ATPG tools to derive tests for faults within the module. Applying the technique to benchmark processor designs, we were able to obtain test efficiencies for the embedded modules of the processors which were extremely close to what the commercial ATPG could do with complete access to the module. The hierarchical approach used produced this result, using the same commercial tool, but required a CPU time several orders of magnitude less than when using a conventional, flat view of the circuit

Keywords

automatic testing; integrated circuit testing; logic testing; microprocessor chips; production testing; ATPG tools; benchmark processor designs; commercial ATPG; embedded module; functional test generation method; general purpose processors; hierarchical functional test generation; manufacturing tests; special purpose processors; test efficiencies; Automatic test pattern generation; Benchmark testing; Circuit faults; Circuit testing; Fault detection; Manufacturing industries; Manufacturing processes; Microprocessors; Process design; Sequential analysis;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 1997. Proceedings., International

Conference_Location

Washington, DC

ISSN

1089-3539

Print_ISBN

0-7803-4209-7

Type

conf

DOI

10.1109/TEST.1997.639687

Filename

639687