Title :
An efficient implementation of in-loop deblocking filters for H.264 using VLIW architecture and predication
Author_Institution :
STMicroelectronics Inc., San Diego, CA, USA
Abstract :
This work presents an efficient architecture to implement the in-loop deblocking filter for the H.264 video compression standard. The proposed solution is based on the implementation of a very long instruction word (VLIW) architecture, pipelined processing and predication technique.
Keywords :
adaptive filters; code standards; data compression; parallel architectures; pipeline processing; video coding; H.264; VLIW architecture; in-loop deblocking filters; pipelined processing; predication; very long instruction word; video compression standard; Codecs; Decoding; Filtering; Filters; Hardware; MPEG 4 Standard; Quantization; Transform coding; VLIW; Video compression;
Conference_Titel :
Consumer Electronics, 2005. ICCE. 2005 Digest of Technical Papers. International Conference on
Print_ISBN :
0-7803-8838-0
DOI :
10.1109/ICCE.2005.1429832
