DocumentCode
3186088
Title
Behavioral simulation of fractional-N PLL frequency synthesizers: Phase approach
Author
Bruzdzinski, J. ; Gronicz, J. ; Aaltonen, L. ; Halonen, K.
Author_Institution
Dept. of Micro & Nanosci., Helsinki Univ. of Technol., Espoo
fYear
2008
fDate
6-8 Oct. 2008
Firstpage
121
Lastpage
124
Abstract
Simulation results of a behavioral model of fractional-N PLL synthesizer are shown in this paper. It has the potential of reliable and fast evaluation of phase noise performance of a fractional-N charge-pump PLL. A method of overcoming the numerical inaccuracy due to finite sampling frequency has been applied and is briefly described. The technique allows setting the sampling period according to the lower, reference frequency, instead of high-frequency VCO output thus substantially saving both simulation time and memory for data storage.
Keywords
frequency synthesizers; phase locked loops; phase noise; signal processing equipment; signal sampling; finite sampling frequency; fractional-N PLL frequency synthesizers; fractional-N charge-pump PLL; phase noise performance; sampling period; Decision support systems; Frequency synthesizers; Phase locked loops;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Conference, 2008. BEC 2008. 11th International Biennial Baltic
Conference_Location
Tallinn
ISSN
1736-3705
Print_ISBN
978-1-4244-2059-9
Electronic_ISBN
1736-3705
Type
conf
DOI
10.1109/BEC.2008.4657493
Filename
4657493
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