DocumentCode
3186270
Title
Using Tabu Search for optimization of memory-constrained hybrid BIST
Author
Kruus, Helena ; Jervan, Gert ; Ubar, Raimund
Author_Institution
Dept. of Comput. Eng., Tallinn Univ. of Technol., Tallinn
fYear
2008
fDate
6-8 Oct. 2008
Firstpage
155
Lastpage
158
Abstract
This paper deals with optimization of hybrid BIST testing approach with memory constraints. The traditional external tester is often unfeasible for embedded systems and therefore different self-test solutions are sought after. Classical built-in self-test (BIST) approaches are largely based on pseudorandom testing and using linear feedback shift registers (LFSR). One of the possible extensions of classical BIST is hybrid BIST, where pseudorandom tests are complemented with precomputed deterministic test patterns to increase test coverage and reduce test time. Hybrid BIST optimization method based on Tabu Search is proposed in this paper. As a generalization of local optimization, Tabu search method is used for finding the optimal solution. The objective is to minimize test length under given memory constraints, without losing test quality.
Keywords
built-in self test; embedded systems; logic testing; shift registers; built-in self-test; embedded systems; hybrid BIST testing; linear feedback shift registers; memory constraints; pseudorandom testing; tabu search; Automatic testing; Built-in self-test; Constraint optimization; Electronic equipment testing; Embedded system; Linear feedback shift registers; Memory management; Optimization methods; Random sequences; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Conference, 2008. BEC 2008. 11th International Biennial Baltic
Conference_Location
Tallinn
ISSN
1736-3705
Print_ISBN
978-1-4244-2059-9
Electronic_ISBN
1736-3705
Type
conf
DOI
10.1109/BEC.2008.4657502
Filename
4657502
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