A CMOS analog-to-digital converter for a digital RF memory

Author

Mehalic, Mark A. ; Keele, Ray L.

Author_Institution

Dept. of Electr. & Comput. Eng., Air Force Inst. of Technol., Wright-Patterson AFB, OH, USA

fYear

1992

fDate

18-22 May 1992

Firstpage

79

Abstract

The authors describe the design of a CMOS analog-to-digital converter (ADC) for use with a CMOS digital RF memory (DRFM) previously constructed. The ADC is needed to digitize the incoming RF signal, which is bandlimited to 50 MHz, so that the DRFM can store and operate on the digital words instead of the analog signals. CMOS technology is used with the intent of eventually integrating the ADC into the same package as the DRFM. The theory of operation of the major circuits of the ADC and major multiplexing blocks is reported. HSPICE simulations of the key ADC components were conducted

Keywords

CMOS integrated circuits; analogue-digital conversion; circuit analysis computing; digital simulation; multiplexing equipment; 50 MHz; CMOS analog-to-digital converter; EW; HSPICE simulations; digital RF memory; military equipment; two step architecture; Analog-digital conversion; CMOS technology; Decision support systems; Delay effects; Packaging; RF signals; Radar; Radio frequency; Switches; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Aerospace and Electronics Conference, 1992. NAECON 1992., Proceedings of the IEEE 1992 National

Conference_Location

Dayton, OH

Print_ISBN

0-7803-0652-X

Type

conf

DOI

10.1109/NAECON.1992.220665

Filename

220665