Title :
Fault diagnosis for static CMOS circuits
Author :
Xiaoqing, Wen ; Tamamoto, Hideo ; Saluja, Kewal K. ; Kinoshita, Kozo
Author_Institution :
Dept. of Inf. Eng., Akita Univ., Japan
Abstract :
This paper presents a new methodology for transistor leakage fault diagnosis using both IDDQ and logic information. A method for handling intermediate faulty voltages in fault simulation is proposed. A scheme for generating diagnostic test vectors based on logic information in the presence of intermediate faulty voltages is also proposed. An example is used to demonstrate the new diagnosis methodology
Keywords :
CMOS logic circuits; MOSFET; circuit analysis computing; electric current measurement; fault diagnosis; leakage currents; logic CAD; logic testing; IDDQ; diagnostic test vectors; fault simulation; intermediate faulty voltages; logic simulation; static CMOS circuits; transistor leakage fault diagnosis; CMOS logic circuits; Circuit faults; Cloning; Fault diagnosis; Logic testing; Predictive models; Robustness; SPICE; Semiconductor device modeling; Voltage;
Conference_Titel :
Test Symposium, 1997. (ATS '97) Proceedings., Sixth Asian
Conference_Location :
Akita
Print_ISBN :
0-8186-8209-4
DOI :
10.1109/ATS.1997.643971
