Title :
Using dummy bridging faults to define a reduced set of target faults
Author :
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution :
Sch. of ECE, Purdue Univ., West Lafayette, IN, USA
Abstract :
The large numbers of bridging faults in a circuit resulted in several approaches to the selection of a subset of faults as targets for test generation. These approaches do not guarantee that all the bridging faults (or even that all the bridging faults that are likely to occur) will be detected. We investigate a different approach to the selection of target bridging faults. The approach is based on the introduction of dummy bridging faults, which are not physical faults but whose tests detect large numbers of physical faults. We apply this approach to four-way bridging faults. When no approximations are made, the proposed approach selects a subset of faults such that if they are detected, all the four-way bridging faults are guaranteed to be detected. We also investigate approximations and a test generation approach for the selected faults.
Keywords :
automatic test pattern generation; fault simulation; integrated circuit testing; logic testing; automatic test pattern generation; dummy bridging faults; fault detection; fault diagnosis; integrated circuit testing; reduced target fault set; target bridging faults; test generation; Bridge circuits; Circuit faults; Circuit testing; Cities and towns; Electrical fault detection; Fault detection; Fault diagnosis; Threshold voltage;
Conference_Titel :
Test Symposium, 2005. European
Print_ISBN :
0-7695-2341-2
DOI :
10.1109/ETS.2005.45