An advanced dataflow processor architecture based on a multiple input node concept

A novel dataflow concept, multiple input node, is introduced to overcome the performance and efficiency degradation problems that exist in the current dataflow computation models. Multiple input node is a new computation code which has 4 inputs; hence it can accept up to 4 token packets at a time. The unique architecture of the multiple input node reduces the number of token packets in the system and therefore increases performance. Also introduced is a newly designed dataflow processor architecture, multiple input node dataflow processor, which utilizes the multiple input node concept. The processor also has RISC (reduced instruction set computer) based design, a 4-stage pipeline architecture, a peak performance of 60 MIPS, and a direct matching scheme