Title :
TEM analysis of failed bits and improvement of data retention properties in megabit-DRAMS
Author :
Onishi, Shigeo ; Ayukawa, Akitsu ; Tanaka, Kenichi ; Sakiyama, Keizo
Author_Institution :
Sharp Corp., Nara, Japan
Abstract :
Direct observation of failed bits in DRAMs indicates that the dislocation lines originating at the sidewall edge of the cell plate cause data retention errors. The elongated dislocation lines were observed during the annealing treatment after As-implantation. It was found that the failure due to n/sup +/-substrate leakage in the cell increased in proportion to the dislocation density. The failure due to the leakage was greatly decreased by eliminating As-implantation in the regions between the cell plate and the transfer gate. The yields were also improved.<>
Keywords :
DRAM chips; MOS integrated circuits; VLSI; annealing; failure analysis; integrated circuit technology; ion implantation; transmission electron microscope examination of materials; As implantation; TEM analysis; ULSI; annealing treatment; cell plate; data retention errors; data retention properties; dislocation density; dislocation lines; elongated dislocation lines; failed bits; megabit-DRAMS; sidewall edge; transfer gate; yields; Annealing; Chemicals; Crystallization; Failure analysis; Grinding machines; Silicon; Stacking; Testing; Thermal degradation; Ultra large scale integration;
Conference_Titel :
Reliability Physics Symposium, 1990. 28th Annual Proceedings., International
Conference_Location :
New Orleans, LA, USA
DOI :
10.1109/RELPHY.1990.66098