• DocumentCode
    3189238
  • Title

    A generic SoC platform using DPR feature to improve social life

  • Author

    Tanabe, Hiroshi ; Miyata, Kenji ; Yamawaki, Akira ; Serikawa, Seiichi

  • Author_Institution
    Kyushu Inst. of Technol., Kitakyushu, Japan
  • fYear
    2012
  • fDate
    16-18 Dec. 2012
  • Firstpage
    125
  • Lastpage
    128
  • Abstract
    Our life has become useful by electrical products, but not all elderly people and disabled people can get contribution by it. Wearable supporting systems are needed to for such people to get usefulness anywhere. Since supporting systems vary according to what support to and the characteristics of target person, it must satisfy the high-mix low-volume nature of such products. Also, in a low-end embedded product with wearable nature, realizing the signal processing as hardware is required in terms of performance and power consumption. The Dynamic partial reconfiguration (DPR) of hardware is one of the candidates to tackle such problem. This paper proposes a generic system-on-chip (SoC) platform, dynamic partial reconfiguration platform (DyREP), which uses the DPR nature. Through the case study that binarizes an image and uses a prototype system of DyREP with an FPGA, we show some results.
  • Keywords
    embedded systems; field programmable gate arrays; handicapped aids; system-on-chip; wearable computers; DPR feature; DyREP; FPGA; disabled people; dynamic partial reconfiguration platform; elderly people; electrical products; generic SoC platform; low-end embedded product; social life; system-on-chip; wearable supporting systems; Argon; Electronic countermeasures; Floors; Hardware; Libraries; Registers; Writing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    System Integration (SII), 2012 IEEE/SICE International Symposium on
  • Conference_Location
    Fukuoka
  • Print_ISBN
    978-1-4673-1496-1
  • Type

    conf

  • DOI
    10.1109/SII.2012.6427300
  • Filename
    6427300