Abstract :
Testing integrated circuits with millions of transistors puts strong requirements on test volume, test application time, test speed, and test resolution. To overcome these challenges, it is widely accepted to partition test resources between the automatic test equipment (ATE) and the circuit under test (CUT). These strategies may reach from simple test data compression/decompression schemes to implementing a complete built-in self-test. Very often these schemes come with reduced diagnostic resolution. In this paper, an overview is given on techniques for embedding test into a circuit while still keeping diagnostic capabilities. Built-in diagnosis techniques may be used after manufacturing, for chip characterization and field return analysis, and even for rapid prototyping.
Keywords :
automatic test equipment; built-in self test; data compression; embedded systems; fault simulation; integrated circuit testing; automatic test equipment; built-in self-test; circuit under test; embedded diagnosis; embedded test; field return analysis; integrated circuits testing; rapid prototyping; test data compression; test data decompression; test resources partitioning; Automatic testing; Circuit faults; Circuit testing; Costs; Environmental economics; Failure analysis; Integrated circuit testing; Manufacturing; Process design; Silicon;