CMOS process compatible ie-Flash (inverse gate electrode Flash) technology for system-on-a-chip

Author

Shukuri, Shoji ; Tanagisawa, K. ; Ishibashi, Koichiro

Author_Institution

Semicond. & Integrated Circuits Div., Hitachi Ltd., Tokyo, Japan

fYear

2001

fDate

2001

Firstpage

179

Lastpage

182

Abstract

A highly reliable single-poly flash technology named ie-Flash (inverse gate electrode Flash), which can be embedded in the common 0.14 μm CMOS process without any process modifications, has been developed. The ie-Flash cell consists of two elementary cells for OR-logical reading, resulting in significant improvement of reliability. 5 V programming with 1 ms duration and 1.2 V-read operation of 35 bit memory modules fabricated by a 0.14 μm CMOS process is demonstrated

Keywords

CMOS memory circuits; application specific integrated circuits; flash memories; integrated circuit reliability; integrated circuit technology; 0.14 micron; 1.2 V; 5 V; CMOS process compatible flash technology; OR-logical reading; SoC application; highly reliable flash technology; ie-Flash; inverse gate electrode flash technology; single-poly flash technology; system-on-a-chip; CMOS logic circuits; CMOS process; CMOS technology; EPROM; Electrodes; Electrons; Integrated circuit reliability; Integrated circuit technology; Random access memory; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits, 2001, IEEE Conference on.

Conference_Location

San Diego, CA

Print_ISBN

0-7803-6591-7

Type

conf

DOI

10.1109/CICC.2001.929750

Filename

929750