Title :
Design methodology of high performance microprocessor using ultra-low threshold voltage CMOS
Author :
Miyake, Tamotsu ; Yamashita, Takeo ; Asari, Norikatsu ; Sekisaka, Hideki ; Sakai, Toru ; Matsuura, Kazuhiro ; Wakahara, Atsushi ; Takahashi, Hideyuki ; Hiyama, Toru ; Miyamoto, Kazuhisa ; Mori, Kazutaka
Author_Institution :
Device Dev. Center, Hitachi Ltd., Tokyo, Japan
Abstract :
A new design methodology of high performance CMOS MPU that applies ultra-low VTH, which is necessary to improve circuit performance with low power supply voltage, is discussed. The multi-VTH, the IDDQ measurement with back bias control at low temperature and IDDQ technologies are applied in order to speed up, without increasing background leakage, IDDQ test. As a result, operation frequency of 64 bit MPU was successfully improved 340 MHz to 560 MHz without lowering IDDQ quality
Keywords :
CMOS digital integrated circuits; integrated circuit design; low-power electronics; microprocessor chips; 560 MHz; 64 bit; IDDQ measurement; back bias control; background leakage; design methodology; high performance microprocessor; power supply voltage; ultra-low threshold voltage CMOS; CMOS technology; Circuit optimization; Circuit testing; Design methodology; Frequency; Low voltage; Microprocessors; Power supplies; Temperature control; Velocity measurement;
Conference_Titel :
Custom Integrated Circuits, 2001, IEEE Conference on.
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-6591-7
DOI :
10.1109/CICC.2001.929773
