Spur suppression technique for multiplied delay locked loop

This paper presents spur suppression technique for multiplied delay locked loop (MDLL), and a spur model of MDLL using Markov chain analysis. By randomly reloading the reference edge to the delay line, the reference spur caused by systematic timing error are reduced by more than 20 dB compared to a conventional MDLL. On the other hand, the rms jitter is reduced by half compared to a PLL without reference reload. The effectiveness of spur and noise reduction are verified by the proposed model and experimental results.