DocumentCode
3190964
Title
Design of low area-overhead ring oscillator PUF with large challenge space
Author
Sahoo, Durga Prasad ; Mukhopadhyay, Debdeep ; Chakraborty, R.S.
Author_Institution
eSE, IIT Kharagpur, Kharagpur, India
fYear
2013
fDate
9-11 Dec. 2013
Firstpage
1
Lastpage
6
Abstract
Exorbitantly high resource-overhead is an important limiting factor for designing a Ring Oscillator Physically Unclonable Function (ROPUF) with large challenge-space. This work presents a design approach for large ROPUF with much lesser resource than that required for classical ROPUF design. It exploits small ROPUFs as design building blocks. Quality of the proposed scheme has been validated by the design of 60-bit ROPUF on Altera FPGA (Field Programmable Gate Array) that is physically infeasible according to previously proposed direct design principles. The hardware resource required for the 60-bit proposed ROPUF design is lesser than that for 10-bit classic ROPUF. In addition, implementation of 60-bit proposed ROPUF shows 47% uniqueness and 91 % reliability on average.
Keywords
field programmable gate arrays; integrated circuit design; oscillators; Altera FPGA; ROPUF design; design building blocks; direct design principles; field programmable gate array; hardware resource; large challenge-space; low area-overhead ring oscillator PUF design; ring oscillator physically unclonable function; Delays; Field programmable gate arrays; Reliability; Ring oscillators; Silicon; Systematics; Arbiter PUF; challenge-response pair; physically unclonable junction; process variation; ring oscillator PUF;
fLanguage
English
Publisher
ieee
Conference_Titel
Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on
Conference_Location
Cancun
Print_ISBN
978-1-4799-2078-5
Type
conf
DOI
10.1109/ReConFig.2013.6732277
Filename
6732277
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