DocumentCode :
3191106
Title :
RTL morphing: making IP-reuse work in system-on-a-chip designs
Author :
Yamashita, Shunzo ; Chikata, Hidetoshi ; Onishi, Yuji ; Kato, Naoki ; Hiyama, Tom ; Yano, Kazuo
Author_Institution :
Central Res. Lab., Hitachi Ltd., Tokyo, Japan
fYear :
2001
fDate :
2001
Firstpage :
549
Lastpage :
552
Abstract :
The proposed RTL morphing enables true IP-reuse design through flexible control of the RTL structure under the changes in performance requirements or delay constraints. This flexible RTL restructuring is provided by a new path-depth controlling method, which can optimize the depth of any path by changing the if-then-else nesting order of a basic logic unit (called a decision unit). The use of RTL morphing reduces the design period of a time-to-market pressured SoC of 4M transistors by two months with 18% operating frequency improvement
Keywords :
application specific integrated circuits; delays; high level synthesis; industrial property; integrated circuit design; IP-reuse; RTL morphing; SoC; delay constraints; design period; if-then-else nesting order; operating frequency; path-depth controlling method; performance requirements; system-on-a-chip designs; Clocks; Control systems; Delay effects; Frequency; Laboratories; Logic; Optimization methods; System-on-a-chip; Time to market; Ultra large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits, 2001, IEEE Conference on.
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-6591-7
Type :
conf
DOI :
10.1109/CICC.2001.929840
Filename :
929840
Link To Document :
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