DocumentCode :
3191301
Title :
High-speed I/O jitter modeling methodologies
Author :
Ren, Jihong ; Oh, Dan ; Chang, Sam
Author_Institution :
Rambus Inc., Los Altos, CA, USA
fYear :
2010
fDate :
25-27 Oct. 2010
Firstpage :
113
Lastpage :
116
Abstract :
As data rate pushes to 10Gbps and beyond, timing jitter has become one of the major factors that limit the link performance. Thorough understanding of the link jitter characteristics and accurate modeling of their impact on link performance is a must even at early design stage. This paper discusses the characteristics of timing jitter in typical I/O interfaces and overviews various jitter modeling methods proposed in the literature during the past few years. Recommendations are given based on the characteristics of timing jitter and their locations.
Keywords :
intersymbol interference; telecommunication links; timing jitter; I/O interfaces; high-speed I/O jitter; link jitter; timing jitter; Clocks; Jitter; Noise; Power supplies; Receivers; Time domain analysis; Transmitters; jitter amplification; jitter tracking; statistical link analysis; timing jitter;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Performance of Electronic Packaging and Systems (EPEPS), 2010 IEEE 19th Conference on
Conference_Location :
Austin, TX
Print_ISBN :
978-1-4244-6865-2
Electronic_ISBN :
978-1-4244-6866-9
Type :
conf
DOI :
10.1109/EPEPS.2010.5642559
Filename :
5642559
Link To Document :
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