DocumentCode
3191348
Title
Design optimization of microstrip lines with via fences through surrogate modeling based on polynomial functional interpolants
Author
Rayas-Sánchez, José E. ; Vargas-Chávez, Noel
Author_Institution
Dept. of Electron., Syst. & Inf., ITESO (Inst. Tecnol. y de Estudios Superiores de Occidente), Tlaquepaque, Mexico
fYear
2010
fDate
25-27 Oct. 2010
Firstpage
125
Lastpage
128
Abstract
A common technique to reduce crosstalk between microstrip lines consists of using via fences or guard traces. However, via fences may significantly increase the amount of reflections at the signaling microstrip lines. We propose an EM-based design optimization method to achieve reduction of crosstalk and transmission losses by the use of via fences without a significant deterioration of impedance matching at the signaling microstrip lines. Our method exploits surrogate models using polynomial-based functional interpolants. We start from a zero-order model that is as simple as a fixed EM model response. This zero-order model is enhanced by multidimensional polynomial interpolants around a reference base point in the design space. The polynomial approximation is a function of the design variables, and it is used to interpolate highly accurate EM responses in a region of interest around the selected base point. Global optimum values for the surrogate model weighting factors are efficiently obtained in closed form. By optimizing the surrogate model, we efficiently find an optimal performance for the microstrip lines with via fences.
Keywords
crosstalk; impedance matching; microstrip lines; optimisation; polynomial approximation; crosstalk; impedance matching; microstrip lines; polynomial approximation; polynomial functional interpolants; surrogate modeling; via fences; zero-order model; Computational modeling; Crosstalk; Impedance matching; Microstrip; Optimization; Polynomials; Testing; Crosstalk; EM-based optimization; guard traces; high-speed interconnects; microstrip via fences; signal integrity; space mapping; surrogate modeling;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Performance of Electronic Packaging and Systems (EPEPS), 2010 IEEE 19th Conference on
Conference_Location
Austin, TX
Print_ISBN
978-1-4244-6865-2
Electronic_ISBN
978-1-4244-6866-9
Type
conf
DOI
10.1109/EPEPS.2010.5642562
Filename
5642562
Link To Document