DocumentCode
3191383
Title
Parallel algorithms on compact binary objects
Author
Johansson, T. ; Bengtsson, E.
Author_Institution
Centre for Image Anal., Uppsala Univ., Sweden
fYear
1994
fDate
9-13 Oct 1994
Firstpage
370
Abstract
For SIMD computers, using virtual processors, a common strategy for mapping the processors on the image data is to apply one processor per pixel. For operations on gray level images it is a good approach, but for operations on binary images many of the available processors are idle and not used in the calculation. This paper presents some common binary operations on a new and more compact representation of the binary objects in an image, which leads to a more efficient processor utilisation and faster algorithms. The implementations are for a Connection Machine/200. The new data representation is tested on a typical application: the separation of touching objects
Keywords
parallel algorithms; Connection Machine/200; SIMD computers; compact binary objects; compact representation; data representation; parallel algorithms; virtual processors; Concurrent computing; Electrical capacitance tomography; High level languages; Image analysis; Image segmentation; Labeling; Parallel algorithms; Pixel; Shape; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Pattern Recognition, 1994. Vol. 3 - Conference C: Signal Processing, Proceedings of the 12th IAPR International Conference on
Conference_Location
Jerusalem
Print_ISBN
0-8186-6275-1
Type
conf
DOI
10.1109/ICPR.1994.577206
Filename
577206
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