Design of Built in Self Test Asynchronous Micropipeline using Double Edge Triggered D Flip Flop

Asynchronous micropipeline is a popular design style of building asynchronous circuits. This paper presents the novel idea of implementation of Built in Self Test (BIST) asynchronous micropipeline using Double Edge Triggered D Flip Flop(DETDFF). A two stage, 4 bit asynchronous micro pipeline incorporated with built in self test feature and operating in four modes namely normal mode, testing mode, Linear Feedback Shift register (LFSR) and Signature analyzer(SA) modes have been implemented using DETDFF. We had compared our proposed circuit with BIST asynchronous micropipeline designed using BILBO register by Petlin and Furber. We have implemented both the circuits in CMOS 0.13u and 0.18u Technology using T-spice and compared the performance in terms of power consumption and delay.