Dependence of Minimum Operating Voltage (VDDmin) on Block Size of 90-nm CMOS Ring Oscillators and its Implications in Low Power DFM

The minimum operating voltage (V_DDmin) of 90-nm CMOS ring oscillators (RO´s) is investigated in order to clarify the lower limit of supply voltage (V_DD) for logic circuits. The measured V_DDmin is determined by the intra-die threshold voltage random variations and increased from 91 mV to 224 mV when the number of RO stages increased from 11 to 1001, which hinders the V_DD scaling. Lowering V_DDmin is difficult, since it would require an impractical inverter-by-inverter adaptive body bias control. Therefore, the fine-grain adaptive V_DD control will be more effective for the ultra low voltage logic circuits to reduce the power consumption.