Noise distribution of multi-core CPU packages

Author

Choi, Jinseong ; Beker, Ben ; Hilbert, Claude

Author_Institution

Adv. Micro Devices, Austin, TX, USA

fYear

2010

fDate

25-27 Oct. 2010

Firstpage

209

Lastpage

212

Abstract

This paper deals with noise distribution over nonuniform two-dimensional planes of multi-core CPU packages. The numerical algorithm is based on circuit finite difference time domain, which employs voltage-controlled current sources in the current/voltage updating scheme. It is applied to plane pairs with non-uniform geometry (which can include metal voids), as well as arbitrary location of sources and decoupling capacitors. The model is extended to a full-3D package stack-up, and the noise distribution on the power planes is analyzed with uniform and point-source excitation.

Keywords

capacitors; finite difference time-domain analysis; interference suppression; microprocessor chips; multiprocessing systems; circuit finite difference time domain; decoupling capacitor; full-3D package stack-up; multicore CPU package; noise distribution; numerical algorithm; point-source excitation; power planes; two-dimensional planes; voltage-controlled current source; Capacitors; Finite difference methods; Integrated circuit modeling; Load modeling; Noise; Silicon; Time domain analysis; PDN; Supply Noise; circuit FDTD;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical Performance of Electronic Packaging and Systems (EPEPS), 2010 IEEE 19th Conference on

Conference_Location

Austin, TX

Print_ISBN

978-1-4244-6865-2

Electronic_ISBN

978-1-4244-6866-9

Type

conf

DOI

10.1109/EPEPS.2010.5642580

Filename

5642580