DocumentCode
3191786
Title
Variation Aware Spline Center and Range Modeling for Analog Circuit Performance
Author
Basu, Shubhankar ; Kommineni, Balaji ; Vemuri, Ranga
Author_Institution
Univ. of Cincinnati, Cincinnati
fYear
2008
fDate
17-19 March 2008
Firstpage
162
Lastpage
167
Abstract
With scaling technologies, process variations have increased significantly. This has led to deviations in analog performance from their expected values. Performance macromodeling aids in reduction of synthesis time by removing the simulation overhead. In this work, we develop a novel spline based center and range method (SCRM) for process variation aware performance macro-modeling (VAPMAC) which works on interval valued data. Experiments demonstrate around 200K times computational time advantage using VAPMAC generated macromodels over SPICE Monte Carlo simulation. The results also demonstrate less than 10% loss in accuracy in computing the performance bounds using the macromodels compared to the SPICE simulations.
Keywords
analogue integrated circuits; integrated circuit design; integrated circuit modelling; splines (mathematics); SPICE Monte Carlo simulation; VAPMAC; analog circuit performance; range modeling; spline based center and range method; variation aware performance macro-modeling; variation aware spline center; Analog circuits; Circuit optimization; Circuit simulation; Circuit synthesis; Computational modeling; Impedance; Performance loss; Runtime; SPICE; Spline; Analog; Center and Range; Process Variation; Spline;
fLanguage
English
Publisher
ieee
Conference_Titel
Quality Electronic Design, 2008. ISQED 2008. 9th International Symposium on
Conference_Location
San Jose, CA
Print_ISBN
978-0-7695-3117-5
Type
conf
DOI
10.1109/ISQED.2008.4479719
Filename
4479719
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