Through silicon via (TSV) shielding structures

Author

Cho, Jonghyun ; Kim, Joohee ; Song, Taigon ; Pak, Jun So ; Kim, Joungho ; Lee, Hyungdong ; Lee, Junho ; Park, Kunwoo

Author_Institution

Dept. of Electr. Eng., KAIST, Daejeon, South Korea

fYear

2010

fDate

25-27 Oct. 2010

Firstpage

269

Lastpage

272

Abstract

Three different shielding structures for noise coupling suppression between through silicon vias (TSVs) are proposed in this manuscript. These structures are modeled using the 3-dimensional transmission line matrix (3D-TLM) method, and the model is verified using EM-simulation. The shielding structures are analyzed with regard to consumption area, manufacturing process compatibility, and noise isolation levels in low, mid, and high frequency ranges. Each shielding structure has unique advantages and disadvantages, and selection of an appropriate shielding structure is needed for effective noise isolation.

Keywords

electromagnetic shielding; three-dimensional integrated circuits; transmission line matrix methods; 3D transmission line matrix method; consumption area; manufacturing process compatibility; noise coupling suppression; noise isolation level; through silicon via shielding structures; Capacitance; Couplings; Integrated circuit modeling; Noise; Silicon; Substrates; Through-silicon vias; TSV-TSV coupling; coupling suppression; guard ring; noise coupling; shielding TSV; shielding structure; through silicon via (TSV);

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical Performance of Electronic Packaging and Systems (EPEPS), 2010 IEEE 19th Conference on

Conference_Location

Austin, TX

Print_ISBN

978-1-4244-6865-2

Electronic_ISBN

978-1-4244-6866-9

Type

conf

DOI

10.1109/EPEPS.2010.5642590

Filename

5642590