Title :
Characterization of New Static Independent-Gate-Biased FinFET Latches and Flip-Flops under Process Variations
Author :
Tawfik, Sherif A. ; Kursun, Volkan
Author_Institution :
Univ. of Wisconsin, Madison
Abstract :
Brute-force sequential circuits with reduced clock load and simpler circuitry are widely used in the state-of-the-art integrated circuits. In this paper, new brute-force independent-gate FinFET sequential circuits are evaluated for power consumption, speed, and noise immunity characteristics at different process corners under parameter fluctuations in a 32 nm FinFET technology. With the independent-gate FinFET latches and flip-flops, the total active mode power consumption, the clock power, and the average leakage power are reduced by up to 47%, 32%, and 37%, respectively, while maintaining similar speed and data stability as compared to the circuits with tied-gate FinFETs across different process corners. Furthermore, the area is reduced by 20% with the new sequential circuits due to the smaller transistors as compared to the circuits with tied-gate FinFETs.
Keywords :
MOS logic circuits; MOSFET; flip-flops; sequential circuits; FinFET technology; brute-force independent-gate FinFET sequential circuits; clock load; flip-flops; integrated circuits; noise immunity characteristics; process corners; process variations; size 32 nm; static independent-gate-biased FinFET latches; tied-gate FinFET; Circuit stability; Clocks; Energy consumption; FinFETs; Flip-flops; Fluctuations; Integrated circuit noise; Integrated circuit technology; Latches; Sequential circuits;
Conference_Titel :
Quality Electronic Design, 2008. ISQED 2008. 9th International Symposium on
Conference_Location :
San Jose, CA
Print_ISBN :
978-0-7695-3117-5
DOI :
10.1109/ISQED.2008.4479746