SoCGuard: A runtime verification solution for the functional correctness of SoCs

The system-on-chip design methodology is characterized by delivering a very high level of design complexity in a short development time. While this aspect is precisely what makes SoCs appealing, it also creates a unique challenge for their verification, requiring the system to be validated as a whole, besides checking the correctness of each of its components. In this paper, we propose a runtime correctness solution for SoCs where we equip each component with two modes of operation: a default high performance one, where all components capabilities are active, and a basic mode where only baseline modules are in operation, so that all basic functionality can be delivered, but performance is not optimized. By alternating between these two modes of execution on individual components, or on all components together, we can carefully sidestep both component and integration bugs that have escaped into the manufactured product. Our experimental evaluation on a LEON3 SoC shows that this solution incurs only 4% area overhead and less than 5% performance impact in most cases.