TM-FAR: Turn-Model based Fully Adaptive Routing for Networks on Chip

Author

Tsai, Wen-Chung ; Chu, Kuo-Chih ; Chen, Sao-Jie ; Hu, Yu-Hen

Author_Institution

Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan

fYear

2010

fDate

27-29 Sept. 2010

Firstpage

19

Lastpage

24

Abstract

A novel Turn-Model based Fully-Adaptive-Routing (TM-FAR) algorithm is proposed for Networks-on-Chip (NoC). TM-FAR retains the deadlock-free property of traditional turn-model based routing algorithms (e.g., XY, Odd-Even), while alleviating restrictions on turn and path selections. Just like the current Virtual-Channel based Fully-Adaptive-Routing (VC-FAR) algorithm, TM-FAR allows full exploitation of all available minimal paths, yet TM-FAR does not use virtual channels. This fully adaptive routing capability of TM-FAR promises improved routing adaptivity and enhanced level of fault-tolerance. Preliminary experimental results indicate that the TM-FAR achieves an averaged delay reduction of 30.08% and a throughput rate increase of 4.54% compared to the state-of-the-art NoC routing algorithm based on the Odd-Even turn model.

Keywords

integrated circuit modelling; network routing; network-on-chip; NoC routing algorithm; TM-FAR algorithm; VC-FAR algorithm; fault tolerance; network-on-chip; odd-even turn model; turn model-based fully adaptive routing; virtual channel-based fully-adaptive routing; Adaptation model; Algorithm design and analysis; Delay; Routing; System recovery; System-on-a-chip; Throughput; NoC; Routing Algorithm; SoC; Turn Model;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI System on Chip Conference (VLSI-SoC), 2010 18th IEEE/IFIP

Conference_Location

Madrid

Print_ISBN

978-1-4244-6469-2

Type

conf

DOI

10.1109/VLSISOC.2010.5642629

Filename

5642629