• DocumentCode
    3192759
  • Title

    Towards reverse engineering the brain: Modeling abstractions and simulation frameworks

  • Author

    Nageswaran, Jayram Moorkanikara ; Richert, Micah ; Dutt, Nikil ; Krichmar, Jeffrey L.

  • Author_Institution
    Dept. of Comput. Sci., Univ. of California - Irvine, Irvine, CA, USA
  • fYear
    2010
  • fDate
    27-29 Sept. 2010
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Biological neural systems are well known for their robust and power-efficient operation in highly noisy environments. Biological circuits are made up of low-precision, unreliable and massively parallel neural elements with highly reconfigurable and plastic connections. Two of the most interesting properties of the neural systems are its self-organizing capabilities and its template architecture. Recent research in spiking neural networks has demonstrated interesting principles about learning and neural computation. Understanding and applying these principles to practical problems is only possible if large-scale spiking neural simulators can be constructed. Recent advances in low-cost multiprocessor architectures make it possible to build large-scale spiking network simulators. In this paper we review modeling abstractions for neural circuits and frameworks for modeling, simulating and analyzing spiking neural networks.
  • Keywords
    learning (artificial intelligence); multiprocessing systems; neural nets; reverse engineering; self-adjusting systems; biological circuit; biological neural system; human brain; large scale spiking network simulator; learning principles; massively parallel neural element; modeling abstraction; multiprocessor architecture; neural computation; power efficient operation; reverse engineering; self-organizing capabilities; simulation framework; spiking neural network; spiking neural simulators; template architecture; Biological system modeling; Brain models; Computational modeling; Computer architecture; Integrated circuit modeling; Neurons; GPU; Spiking neural networks; computational neuroscience; parallel processing; synapse; vision;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI System on Chip Conference (VLSI-SoC), 2010 18th IEEE/IFIP
  • Conference_Location
    Madrid
  • Print_ISBN
    978-1-4244-6469-2
  • Type

    conf

  • DOI
    10.1109/VLSISOC.2010.5642630
  • Filename
    5642630