DocumentCode :
319337
Title :
A modified line expansion algorithm for device-level routing of analog integrated circuits
Author :
Gopalakrishnan, Prakash ; Vasudevan, Vinita
Author_Institution :
Dept. of Electr. Eng., Indian Inst. of Technol., Madras, India
fYear :
1998
fDate :
4-7 Jan 1998
Firstpage :
249
Lastpage :
252
Abstract :
CAD tools developed for routing analog circuits have to give special consideration for the quality of the routes developed, owing to the high sensitivity of these circuits to small changes in the layout geometry. Cost based path-finding algorithms that find globally optimal solutions are thus best suited for implementing routing in analog circuits. In this paper, we propose a modification to the line expansion algorithm used previously, that results in significant savings in time and memory consumed
Keywords :
analogue integrated circuits; circuit layout CAD; integrated circuit layout; network routing; CAD; analog integrated circuit; device-level routing; layout; line expansion algorithm; path finding algorithm; Analog circuits; Analog integrated circuits; Cost function; Data structures; Digital circuits; Geometry; Integrated circuit technology; Merging; Optimization methods; Routing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 1998. Proceedings., 1998 Eleventh International Conference on
Conference_Location :
Chennai
ISSN :
1063-9667
Print_ISBN :
0-8186-8224-8
Type :
conf
DOI :
10.1109/ICVD.1998.646612
Filename :
646612
Link To Document :
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