CVD-PVD aluminum process for DRAM applications

Author

Lee, Won-Jun ; Kim, Jung Joo ; Lee, Suk Jae ; Won Park, Jin ; Park, Heung Lak

Author_Institution

Dept. of Adv. Mater. Eng., Sejong Univ., Seoul, South Korea

fYear

2001

fDate

6-6 June 2001

Firstpage

75

Lastpage

77

Abstract

The integrated CVD-PVD Al process was successfully applied to a 4-gigabit DRAM process flow for the simultaneous formation of plugs and wires. The CVD-PVD Al film completely filled vias with the aspect ratio up to 10:1, and Al plugs showed lower via resistance compared with that of the conventional W plugs. Outgassing from the intermetal dielectric was critical to the complete via filling of CVD-PVD Al film, and the baking after via etch was effective for eliminating outgassing.

Keywords

CVD coatings; DRAM chips; VLSI; aluminium; chemical vapour deposition; integrated circuit metallisation; vapour deposited coatings; vapour deposition; 4 Gbit; Al; Al plugs; CVD-PVD Al film; CVD-PVD Al process; DRAM applications; baking; intermetal dielectric; outgassing elimination; physical vapour depostion; via filling; via resistance; vias; Aluminum; Atherosclerosis; Dielectrics; Etching; Filling; Large scale integration; Metallization; Plugs; Random access memory; Tin;

fLanguage

English

Publisher

ieee

Conference_Titel

Interconnect Technology Conference, 2001. Proceedings of the IEEE 2001 International

Conference_Location

Burlingame, CA, USA

Print_ISBN

0-7803-6678-6

Type

conf

DOI

10.1109/IITC.2001.930022

Filename

930022