DocumentCode
3193624
Title
A broad strategy to detect crosstalk faults in network-on-chip interconnects
Author
Botelho, Mariza ; Kastensmidt, Fernanda Lima ; Lubaszewski, Marcelo ; Cota, Érika ; Carro, Luigi
Author_Institution
Inst. de Inf., Univ. Fed. do Rio Grande do Sul (UFRGS), Porto Alegre, Brazil
fYear
2010
fDate
27-29 Sept. 2010
Firstpage
298
Lastpage
303
Abstract
In this paper, we propose a method to detect crosstalk faults within and among channels of mesh NoCs, using a global test strategy that is based on a particular set of test paths and test packet. All test paths must be activated simultaneously without resource conflict. The test packet is built using Maximal Aggressor Fault (MAF) vectors. The test strategy is capable of detecting 100% of the considered faults. The test application time grows quadratically with the NoC increase, but can be drastically improved by means of two alternative approaches also proposed in the paper. Those local approaches are based on simultaneously testing multiple victims or NoC regions unlikely to aggress each other. The test time then grows linearly and shows a very modest derivative.
Keywords
integrated circuit interconnections; integrated circuit reliability; integrated circuit testing; network-on-chip; MAF vectors; crosstalk fault detection; global test strategy; maximal aggressor fault vectors; mesh NoC; network-on-chip interconnects; test packet; test paths; Circuit faults; Clocks; Crosstalk; Integrated circuit interconnections; Layout; Testing; Wires; Crosstalk Detection; Fault Coverage; Interconnect Testing; Reliability;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI System on Chip Conference (VLSI-SoC), 2010 18th IEEE/IFIP
Conference_Location
Madrid
Print_ISBN
978-1-4244-6469-2
Type
conf
DOI
10.1109/VLSISOC.2010.5642677
Filename
5642677
Link To Document