DocumentCode
3194382
Title
Realistic copper interconnect performance with technological constraints
Author
Kapur, Pawan ; McVittie, James P. ; Saraswat, Krishna C.
Author_Institution
Dept. of Electr. Eng., Stanford Univ., CA, USA
fYear
2001
fDate
6-6 June 2001
Firstpage
233
Lastpage
235
Abstract
Most interconnect performance evaluations with copper, such as, line delays and repeater analysis are done assuming a constant resistivity. However, increase in electron surface scattering and fractional barrier cross section area results in a higher effective Cu resistivity (ρ eff) with dimensional shrinkage. This work models above effects, establishing reliable, future, resistivity trends for different barrier deposition technologies and thicknesses, wire temperature and copper/barrier interface quality. The resistivity trends are used to obtain realistic, future, interconnect performance metrics with Cu. These metrics are found to be a lot worse than predicted by a constant copper resistivity.
Keywords
copper; diffusion barriers; electrical resistivity; integrated circuit interconnections; Cu; copper interconnect; diffusion barrier; dimensional shrinkage; electrical resistivity; electron surface scattering; fractional cross-sectional area; line delay; repeater analysis; Conductivity; Copper; Delay lines; Electrons; Measurement; Performance analysis; Repeaters; Scattering; Temperature; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Interconnect Technology Conference, 2001. Proceedings of the IEEE 2001 International
Conference_Location
Burlingame, CA, USA
Print_ISBN
0-7803-6678-6
Type
conf
DOI
10.1109/IITC.2001.930070
Filename
930070
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