Characterization and simulation of a multi-sampling digital tanlock loop

A digital multisampling structure is discussed which follows an analog front end where the sampling rate and number of quantization levels are independently variable. An approach for simulating the loop is presented along with some preliminary performance results. The multisampling digital tanlock loop (MDTL) appears suitable for synchronization of suppressed-carrier data signals. With the exception of the analog front end which is a part of all high-frequency receiver structures, the MDTL can be easily implemented digitally. The phase error distribution is similar to that of a Costas loop which is optimum, in some sense, in additive white Gaussian noise.<>