Title :
Leading zero anticipation and detection-a comparison of methods
Author :
Schmookler, Martin S. ; Nowka, Kevin J.
Author_Institution :
IBM Server Dev., Austin, TX, USA
Abstract :
Design of the leading zero anticipator (LZA) or detector (LZD) is pivotal to the normalization of results for addition and fused multiplication-addition in high-performance floating point processors. This paper formalizes the analysis and describes some alternative organizations and implementations from the known art. It shows how choices made in the design are often dependent on the overall design of the addition unit, on how subtraction is handled when the exponents are the same, and on how it detects and corrects for the possible one-bit error of the LZA
Keywords :
adders; floating point arithmetic; adders; addition; high-performance floating point processors; leading zero anticipation; leading zero detection; multiplication; normalization; one-bit error; Adders; Art; Circuits; Delay; Design methodology; Detectors; Encoding; Error correction; Fixed-point arithmetic; Laboratories;
Conference_Titel :
Computer Arithmetic, 2001. Proceedings. 15th IEEE Symposium on
Conference_Location :
Vail, CO
Print_ISBN :
0-7695-1150-3
DOI :
10.1109/ARITH.2001.930098
